Summary of Learning to Compare Hardware Designs For High-level Synthesis, by Yunsheng Bai et al.
Learning to Compare Hardware Designs for High-Level Synthesis
by Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding, Rongjian Liang, Weikai Li, Ding Wang, Haoxing Ren, Yizhou Sun, Jason Cong
First submitted to arxiv on: 20 Sep 2024
Categories
- Main: Machine Learning (cs.LG)
- Secondary: Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR)
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| Summary difficulty | Written by | Summary |
|---|---|---|
| High | Paper authors | High Difficulty Summary Read the original abstract here |
| Medium | GrooveSquid.com (original content) | Medium Difficulty Summary The paper proposes a novel approach to high-level synthesis (HLS), an automated process for transforming code into hardware designs. Existing ML-based HLS methods, such as HARP, utilize deep learning models, typically graph neural networks (GNNs), applied to graph-based representations of the source code and pragmas. These models are trained to perform design space exploration (DSE) and rank candidate designs based on performance metrics. However, traditional DSE methods face challenges due to the complex relationships between pragma settings and performance metrics, as well as interactions between pragmas that affect performance in non-obvious ways. |
| Low | GrooveSquid.com (original content) | Low Difficulty Summary This paper is about making it easier to turn computer code into hardware designs for special accelerators. Right now, this process requires lots of human effort and expertise. The researchers are trying to use machine learning to speed up the process by training computers to understand how different settings can affect the design. They want to make sure that the resulting hardware works well and is efficient. |
Keywords
» Artificial intelligence » Deep learning » Machine learning
