Summary of Analogous Alignments: Digital “formally” Meets Analog, by Hansa Mohanty and Deepak Narayan Gadde

Analogous Alignments: Digital “Formally” meets Analog

by Hansa Mohanty, Deepak Narayan Gadde

First submitted to arxiv on: 23 Sep 2024

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Summary difficulty	Written by	Summary
High	Paper authors	High Difficulty Summary Read the original abstract here
Medium	GrooveSquid.com (original content)	Medium Difficulty Summary The paper presents a novel formal verification approach for mixed-signal Intellectual Property (IP) designs that combine digital and analog blocks. The authors aim to left-shift the verification efforts by exhaustively verifying designs using formal methods, providing better confidence in the overall quality. They propose a “Analogous Alignments” concept that seamlessly integrates digital and Analog Mixed-Signal (AMS) designs into a formal verification setup. The approach leverages techniques such as FPV, CSR verification, and connectivity checks, auto-generating properties for FPV using a metamodeling framework. The authors also discuss challenges related to state-space explosion, non-compatibility with AMS models, and mitigation techniques like k-induction.
Low	GrooveSquid.com (original content)	Low Difficulty Summary The paper is about making sure that chips work correctly before they’re made. It’s hard to do this because chips have many parts that need to work together. Formal verification is a way to check if all the parts will work together correctly. The authors propose a new method for doing formal verification on special kinds of chips that mix digital and analog parts. They want to make it easier to verify these chips by using their new approach, which includes techniques like exhaustive checking and property generation. By verifying the chip early on, they can catch mistakes before it’s too late.